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Under-Voltage Lockout (UVLO)
The turn-on and turn-off thresholds are fixed internally at
16 V and 7.5 V, respectively. During startup, the V DD
capacitor must be charged to 16 V through the startup
resistor to enable the FL7732. The V DD capacitor
continues to supply V DD until power can be delivered
from the auxiliary winding of the main transformer.
V DD must not drop below 7.5 V during this startup
process. This UVLO hysteresis window ensures that the
V DD capacitor is adequate to supply V DD during startup.
Over-Temperature Protection (OTP)
The FL7732 has a built-in temperature-sensing circuit to
shut down PWM output if the junction temperature
exceeds 150°C. While PWM output is shut down, the
Figure 21.
Internal OVP Block
V DD voltage gradually drops to the UVLO voltage. Some
of the internal circuits are shut down and V DD gradually
starts increasing again. When V DD reaches 16 V, all the
internal circuits start operating. If the junction
temperature is still higher than 140°C, the PWM
controller is shut down immediately.
Figure 22.
Waveforms in Open-LED Condition
? 2011 Fairchild Semiconductor Corporation
FL7732 ? Rev. 1.0.6
11
www.fairchildsemi.com
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